New solid-state memory
A few days ago I read on the agency of the British press Reuters this news
SEOUL (Reuters) – Samsung Electronics Co. Ltd. plans to invest 7 billion over the next three years to expand its production of NAND memory chips in the northwestern Chinese city of Xi'an, said on Monday the South Korean technology giant.
Here my mind is playing in several directions, because in China and what are the NAND?
For the first question is easy to see, the missile tests and other nuclear Korean herald instability.
For the South Korean giant agrees to transfer production in relatively safe places with low production costs.
For the second part of the question it is in order a rundown on what to have such memories, the various types and technologies used.
There are primarily two types of flash memory, dette NOR flash e NAND flash.
As it is made a memory cell
First things first, let's start from NOR memories, the premium to be produced, essentially each cell is similar to a MOSFET with the only difference of having two gate. One is the classic control (CG control gate) while the other is completely isolated by a layer of oxide (FG floating gate) The floating gate is located between CG and substrate, since it is isolated, each electric charge that arrives there overcoming the dielectric oxide gave, It remains trapped them by changing the conduction threshold voltage of the MOSFET.
The cell is read by applying a voltage on CG, the current which flows through the MOSFET channel will be greater or lesser depending on the charges present in FG interpretable with a logic level "0" or "1"
.As the cell is programmed
The NOR are programmed by applying a higher voltage of 5V on CG activating the channel, with the higher energy charges exceed the dielectric and moving electrode FG and remained trapped.
The NAND instead inject the charges through the tunnel effect in FG.
The deletion in both types fruit the tunnel effect, applying a potential difference between CG and surce so as to extract the charges in FG.
The read and write operations occur in blocks of cells that can be up to 64kb depending on the total size of the flash in use. On the other hand this is that even the modification of a single cell involves the around the block rewrite.
Considering the complexity of the writing and reading system it can be deduced that it can be understood that from the point of view of speed are not competitive with other storage systems. But they are entirely solid state, They do not require a great deal of energy for operations and have a useful life cycle than 10,000 cycles of modification, These aspects make them preferable in all those portable storage systems are battery powered.
The NOR we find common in microprocessors to contain the firmware thanks to their minimal access time for random reads, useful precisely to execute the code directly from the memoranda without a support cache.
The NAND are easier to achieve and large half allowing a large integration at equal committed silicon surface, but needs to 5 milliseconds for programming against 4 NOR, They are used in all Memory Cards or keys that each has in your pocket or on your mobile phone.
We return to the starting news,Samsung has revolutionized the field of flash passing from the classical planar NAND in a vertical structure. The new V-NAND technology features a unique design that stacks up to now 64 layers one above the other. Instead of trying to reduce the size of the space occupied by the cells used the Technology Channel Hole ( Cःt ) to allow the cells to connect vertically through a cylindrical channel which passes through. By applying the innovative technology CTF, that uses a non-conductive layer of silicon nitride ( Without ) , temporarily trapping electric charges to maintain the integrity of the cells .
This non-conductive layer surrounds the CG of the cell and acts as an insulator which holds the charge in order to prevent data corruption caused by interference between neighboring cells, having regard to the dimensions pushed to the limit. The traditional planar NAND memory requires the creation of a series of complex algorithms to prevent data corruption, caused by interference . The V-NAND are virtually immune to this problem by allowing the memory to write with a speed up to two times higher than the traditional 2D planar NAND flash memory and a saving of energy equal to the 45%.
Given the potential we understand the interest that the Korean giant for such memories.
As a conclusion I can say that even a marginal economic news of a news agency can hide many interesting implications.
The idea to study a branch of technology that at the end of five years will be routine in most commonly used devices.