Simple peak limiter

Simple peak limiter

There are some situations, in which it requires an amplifier which imposes limitations on the output signal. What I mean is the following: for small input signals, the gain is a certain value. This gain remains more or less unchanged with increasing input amplitude, which is fine. At a certain point, the amplifier must stop amplify, because the downstream components may be damaged if the input amplitude exceeds a certain threshold. An amplifier which behaves in this way is called limiter, since it also limits the amplitude output by incorporating a non-linear response in its transfer function.

A specific example of this type of application is the input of an ADC, excessive amplitude input may break something.

The circuit


First let's see how the circuit works. Here we will discuss only the basic concepts; you can explore the features in more detail by means of simulations. The non-linear amplitude control is obtained (not surprisingly) incorporating the non-linear current-voltage characteristics of a diode. When the output voltage is low, both diodes are polarized inversely. This means that we can analyze the circuit as if they were not even there, and when we do, we see that the limiter is only a typical inverting operational amplifier with some resistors connected between the output and the supply voltages. As expected, then, the limiter is just a normal amplifier provided that the output is not high or low enough to cause its throttling feature.

The higher output, however, the voltage at the anode of D2 starts to increase with respect to the voltage at the operational amplifier inverting input terminal. Eventually the voltage across the diode will reach ~ 0,6 V and the diode will begin to conduct. With D2 conductor, RF is bypassed and the operational amplifier becomes a voltage follower, in other words, the gain is reduced and the output amplitude is limited.

The input voltage is decreasing, and consequently the output voltage increases. Also the voltage at the anode of D2 is increasing and when the input voltage reaches approximately -0,4 V, the voltage on D2 is high enough to ensure that the diode starts to conduct. The voltage on D2 then levels off, as one would expect from a diode with a forward bias. The graph below confirms that the output voltage is leveled.


A similar process occurs with the diode D1.

Design Details

The non-limiting gain is set using RF and R1; as you can see in the diagram above, my circuit is set for a gain of 10. The next task is to establish the positive and negative voltage limits. If you reflect on the circuit, you will see that R4 and R5 form a voltage divider, in such a way that the anode voltage D2 (and by extension the positive limit voltage) It depends on the ratio between R4 and R5. Similarly, cathodic voltage D1 (and by extension the negative limit voltage) It depends on the ratio between R3 and R2. The complete equations are as follows:

I calculated the resistor values ​​for the limits +5 V e -5 V. The following graph shows that the circuit works as expected;the different tracks are the output signals for the amplitudes of the input signal ranging from 0,1 V a 1,1 V in otto step. It should be noted the trend of smooth transitions from linear behavior to the limitation.


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