codifies Manchester: what is it and why use it?

codifies Manchester: what is it and why use it?

The Manchester encoding, a simple and effective way to improve digital communication for high-speed or wireless.

You've probably noticed that the serial digital communication has become quite popular. There are many flavors: including standard interfaces at the board level we UART , SPI e I2C. The comunication “digital” It can also be realized by means of analog signals; an example is an RF data link which uses amplitude changes, frequency or phase to transfer binary data in wireless mode. And then there are high-speed differential interfaces , such as serial communication links based on LVDS or USB.

The Manchester encoding is a data modulation technique that can be used in many situations, but it is particularly useful in the transfer of binary data based on analog signals, RF, optical, digital high speed or long-distance digital signals.

The coding standards Ethernet uses Manchester encoding.

Good, but not perfect

Despite the overwhelming advantages of standard digital communication than analog signaling, there are some general limitations. One is the problem of synchronization: the receiver needs to know exactly when to sample the incoming data (Note that this synchronization is not necessary in, for example, an analog audio transmission – the demodulated audio signal can be delivered to the speaker without explicit interpretation of data on the receiver side).

Another is the need for DC coupling. Digital data can include long, uninterrupted sequences of one or zeros, and then a standard digital signal used to transmit these data will remain at the same voltage for a relatively long period of time. If we tried to pair this signal using a blocking capacitor we would have problems, as shown in the following diagrams LTSpice.

For one thing the DC decay decays to zero, then everything is fine as long as the signal is in transition. But when a long sequence of one or zero due to the interruption of the original signal transition, the digital signal becomes a constant voltage which is blocked by the capacitor.

A solution

The Manchester encoding provides a remedy to these two limitations. It is a simple digital modulation scheme that does two things:

  1. It ensures that the signal does not ever remains at a low logic level or logic high for a long period of time

  2. It converts the data signal into a sync data signal.

Before going into the details of coding Manchester, we discuss the motivation: why not just add a separate clock signal for synchronization? And why should we be coupled to a digital signal ac?

Clock to Avoid

In many cases, it is perfectly acceptable to use a separate clock signal to achieve synchronization between transmitter and receiver. But sometimes this approach is undesirable, as when it is necessary to minimize the number of interconnections between the parts of a system, or when the miniaturization requires the microcontroller with a low number of pins that somehow may provide the required functionality.

In other situations, a separate clock signal is not practicable. Eg, it would be highly inefficient include two separate transmitters and RF receivers (eg, one for data and one for the clock) in a complex wireless data connection.

If you're familiar with the UART interface, it is known that it is possible to use the internal timing signals instead of an external clok shared by the transmitter and receiver. But this strategy has significant limitations:

  • It is robust against internal clock frequency variations, they become more problematic when the transmitter and receiver are in different environments.

  • It lacks flexibility because it requires that the Tx and Rx devices are explicitly configured for the same data transmission speed.

  • Generally, the receiver requires an internal clock frequency significantly higher than the data transmission speed, , which might pose of annoying restrictions on the maximum speed at which data can be transferred.

Avoid DC connection

With complex systems, especially those involving high voltages, It is not always easy to ensure that the common mode voltage of a transmitted signal is compatible with the common mode range of the receiver acceptable. This is a problem even when using a differential standards such as RS-485 . Another concern is the current in case of failure: direct coupling offers no protection against the currents resulting from a short circuit.

Therefore, AC coupling is a simple way to mitigate the drawbacks and the risks .

The Manchester solution

The idea behind the Manchester coding is as follows: we can use transitions voltage , instead of levels tensile , to represent ones and zeros. Consider the following diagram:

In the upper part of the diagram we have a digital interface standard composed of a data signal and a clock signal.

In the bottom of the diagram there is a coded signal from Manchester for the same data.

Note how the transitions occur in the middle of the logic states of the standard data signal (in other words, the Manchester transition is aligned with the edge of the clock which would be used to sample data).

Note also that a high bit always corresponds to a high to low transition and a low bit always corresponds to a transition from low to high. (You could also use the opposite, the important thing is that the circuits of the receiver know which format to expect).

It is immediately clear that the AC coupling problem is eliminated: each bit requires a transition and therefore the data signal will not be never at a low logic level or logic high for a long period of time. This is evident in the following diagram, showing a standard digital signal 111111 tracks and a signal encoded from Manchester for the same binary sequence, It has been omitted for convenience the clock signal as it is not relevant to the design.

The synchronization problem is a bit 'less simple because we still need to pull in some way by the clock signal; however, we can intuitively see that the regularity of transitions provides information on when the data signal is to be sampled.

The above diagram also shows a non-trivial disadvantage of Manchester encoding: the data transmission rate is halved compared to the bandwidth of the data signal. A signal encoded by Manchester requires a transition for each bit, which means that due logic states of Manchester are used to transmit one standard state logic. Therefore, to transfer data at the same speed it is necessary to double the bandwidth.

This may not seem like a problem, why not just use a high frequency signal? Good, if the signal bandwidth is the limiting factor of the speed with which data can be moved from the transmitter to the receiver and if it is already at the maximum data transmission speed, you can not increase the frequency of the signal by a factor of two; instead, you need to reduce the data rate by a factor of two.

How to generate encoded data from Manchester in hardware and firmware

The Manchester encoding is a form of modulation , but do not worry, It is much simpler RF techniques that are most commonly associated with the word. This modulation scheme requires digital data only, the corresponding clock signal and a bit 'hardware or firmware. The differences between the modulated data and the original data are as follows:

  • The data is represented using transitions logic level rather than logical levels.
  • The clock signal should not be sent to the receiver because it is embedded in the data stream modulated.

In addition to eliminating the need for a clock signal transmitted, Manchester encoding makes it possible to use AC coupling, since the modulated signal does not remain at logic high or low level for a long period of time. A major disadvantage of Manchester encoding is the reduced data rate: because the ones and the zeros are represented using the transitions instead of the logical levels, a logic state in the original signal is transformed into two logic states in the Manchester signal.

Manchester via Hardware

In theory, It is extremely easy to generate a data stream encoded by Manchester through hardware. A difference of the analog circuit carefully designed and powerful digital signal processors used for advanced RF modulation techniques, Manchester encoding requires only a XOR gate.

This can be checked easily by looking at the timing diagram shown above: when clock and data are at the same logic level, the Manchester signal is low; when they are at different logic levels, the Manchester signal is high.

The reason that this is an implementation more “theoretical” It is because the output of the XOR gate will be subject to spurious transitions, also called glitch. This is a problem not trivial because the Manchester encoding applies only to the transitions. These spurious transitions occur because the XOR gate is a very simple device. All it does is compare two inputs and generate an output based on the truth table XOR. If the clock signals and data are not perfectly aligned (and it is never a good idea to expect perfection), one pass before the other, and XOR gate is fast enough to update its output based on this combination transient (and wrong) of the two input signals.

I do not think that the XOR drastic approach is useless. If you can ensure a good synchronization between the data and clock signals, as when the two signals are generated and XORizzati within an FPGA, It could probably work quite well. Furthermore, the effect of imperfect synchronization is less significant when the data period is very long compared to the duration of the glitch, since the spurious transitions (Higher frequency) You can be filtered before the Manchester data is interpreted by the receiver.

As far as I know, this technical problem can not be solved simply by adding a door here or a flip-flop there. The Internet searches do not produce a lot of information, probably because today is much more common generate the Manchester data in the firmware (see the next section). However, it seems that A Harris. Quesnell Jr. was determined to generate data of the Manchester error-free without the use of firmware, and you can read its circuit in the patent documentation.

This is the scheme reported in the patent.

As I said, It is not the kind of thing that can be achieved by adding a couple of doors or a flip-flop. I appreciate the hardware solutions, but in this case, Council to tackle the problem in Manchester firmware.

Manchester through firmware

An implementation of the firmware eliminates spurious transitions because the original data is converted into a Manchester sequence of ones and zeros before it becomes a normal electrical signal. All you have to do is drive this sequence of ones and zeros on a GPIO pins, And that's it. In this case, the advantages over hardware implementation are quite significant. Most systems these days already includes a processor can handle this activity.

Not much to say about the details necessary to make the firmware-based encryption. They take the original data and replacing each one or zero with a one-zero torque (or a falling edge transition) or a zero-one couple (that is a transition of the rising edge). It is therefore possible to insert these bits Manchester on an output pin by using an interrupt service routine associated with an overflow timer according to the desired transmission speed. Another option is to use one of the serial communication peripherals processor.

How to decode the data encoded from Manchester via the hardware

So far, so good, but the encoding of Manchester will have little value in the communication system if you can not convert a Manchester signal into ones and zeros values.

Slice data

A circuit that can come in handy at any of Manchester receiver is called “data slicer”.

We know that the Manchester encoding is compatible with AC coupling and, when the AC coupling is used, the average value of the received signal will be zero. However, the logic-high and logic-low characteristics can be less predictable, especially when the Manchester signal is exposed to noise or significant attenuation during its travel from the transmitter to the receiver.

A data slicer (I know the Italian translation of the word is not the best, I accept suggestions), this converts the noisy waveform / attenuated in a form of clean digital wave by comparing the Manchester signal with the average value of the signal; the average value is extracted using a low-pass filter RC. If the incoming signal is higher than the average value, the comparator becomes saturated at the high logic voltage; if the incoming signal is below the average value, saturates to the low logic voltage.

As usually it happens with comparator circuits, a real implementation should incorporate the hysteresis not drawn in the principle diagram to simplify the discussion. If you plan to process the Manchester data in a microcontroller, it is possible to choose a device with a comparator module that incorporates the programmable hysteresis. This would be a convenient way to divide the incoming data and provide the resulting waveform directly to the processor which will convert the Manchester signal cleaned in normal data at logic level.

Decoding through hardware

After cutting data, the receiver has a signal encoded by Manchester conforms to the expected logic levels and devoid of significant amounts of noise. The next task is conceptually simple, but not always so easy in real life: We are we to understand the positive and negative transitions as ones and zeros (Zeri e uno, depending on how you encoded data).

You can perform this operation by means of hardware. I am willing to bet, however, that most of the Manchester-based devices use the firmware for decoding. Hardware implementations are very complex and can not compete with the flexibility and advanced features that can be easily incorporated into a microcontroller or digital signal processor. However, the hardware is faster and does not consume CPU resources, so there is definitely a value in pursuing a decoding solution based, at least in part, hardware.

Microchip

I found this first circuit in an app notes of Microchip.

http://ww1.microchip.com/downloads/en/AppNotes/01470A.pdf

It is not intended to be a self-decoding solution; Rather, They are presenting an approach that can be implemented using hardware that have built in some of their recent microcontrollers, that means, the configurable logic cells (CLC) and a numerical control oscillator (REMEMBER).

Diagram taken from Microchip.

Cypress

The next circuit is Cypress and must be used with a PSoC 1.

always from an app notes of the manufacturer

http://www.cypress.com/file/138821/download

Diagram taken from Cypress.

Both of these implementations are interesting in that they do not recover the original data directly from the transitions of Manchester, despite the fact that the Manchester encoding is based on the transitions. Rather, exploit the fact that the original logic level there is always a little before the transition. This will be clearer if we look at the usual time diagram Manchester:

Let's say that the active edge of the clock is the rising edge. If the data signal is low on the rising edge of the clock, the Manchester signal makes a transition from low to high to represent the logic low. If the data signal is high in terms of clock rise, the Manchester signal makes a high to low transition. The Manchester signal has transitions when the clock always has a positive edge.

Furthermore, the Manchester signal is to prepare for this transition by moving, if necessary, status that allows him to make the transition request. If the Manchester signal must make a transition from low to high (corresponding to a logic low), It must be logic low before making this transition. If you must make a high to low transition (corresponding to the high logic), It must be logical before making the transition. Therefore, the logic level of the Manchester signal immediately before the transition is equal to the logic level of the original data.

Both the Cypress approach than that of Microchip incorporate a delay that causes the circuit samples the Manchester signal after they have passed three-quarters of the bit period. This timing is based on the fact that the Manchester signal may have to move to the middle of the bit period (assuming that the bit period beginning with the leading edge of the original watch uphill, as in the diagrams above). By delaying for three quarters of the bit period, the circuit is guaranteed to sample the signal after the transition of the period of the central bits, and before the active transition.

Create the appropriate delay is easy if the receiver always knows the bit period that will be used by the transmitter, but even if it were not, the receiver can recover the clock from the Manchester data stream. You can find more than you ever wanted to know about the recovery of the Manchester clock in this thesis

http://digital.library.okstate.edu/etd/umi-okstate-1551.pdf

 

Silicon Labs

If you want to reflect on another decoder circuit, the following implementation (also it based on the concept of three-fourths of the bit period) It has been designed by SiLabs for use in its microcontrollers that include configurable logic units (CLU).

https://www.silabs.com/documents/public/application-notes/AN921.pdf

Diagram taken from Silicon Labs.

Conclusion

Surely this article will not dispel all the doubts it, via the links in the article will be examined the subject in its entirety.

Continuing further discussion would abandon the reading, for those really interested will be a first taste to continue in the knowledge of this topic. For everyone else it will be a notion that does not hurt to know without having the need to further deepen the topic.

Amilcare

VOTE
2 replies
  1. Amilcare
    Amilcare says:

    I never thought of such a hypothesis, but if it is used currently for LAN transmissions probably the system used to have the original level by looking at the level just before the transition is the same signal before encoding actually works.
    I promise that as soon as I deepen this aspect, and referring.

    Approvals
  2. Avatar
    theremino says:

    nice article !!!
    I read in one breath and made me understand almost everything in five minutes.
    I doubt, however, it remains a. I tried a bit’ on the Internet and I could not fix it:
    1) I have seen the image with the always signal to one that is a square wave at the clock frequency.
    2) I searched the Internet a picture with the ever signal to zero and I have not found.
    3) From what I understand if the signal is always zero it should come out of a square wave equal to that obtained with the ever signal to one. So as it would then distinguish the two signals?

    Approvals

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